Domino Based Low Leakage Circuit for Wide Fan-In or Gates

Dynamic circuits are widely used in many applications because of their high speed nature and less area. Robustness of high fan-in domino circuit degraded by exponential increase in leakage due to technology scaling. So a new technique is proposed for low leakage dynamic CMOS circuit. Stacking effect of NMOS transistor in PDN provides high resistance path to leakage and improves the dynamic performance of the circuit. The proposed method implemented with Tanner EDA 13.0v which reduces the leakage current about 12.68% compared with conventional circuit and reduces Power Delay Product (PDP).