FPGA Implementation of an Enhanced Encryption Then Compression System for Image Security

Image Encryption is the method of transforming information using an algorithm called cipher to make it meaningless to anyone except those having special knowledge, usually referred to as a key. Sometimes the one time key is not secured when encryption take place and decrypted image is not similar as the original image.  This has led to the problem of how to design a pair of image encryption and compression algorithms such that compressing the encrypted images can still be efficiently performed. Here we design a highly efficient system for image Encryption-Then-Compression (ETC), where both lossless and lossy compression are considered. In this paper data compression uses Run Length Encoding (RLE) technique because this method has the ability to generate an exact output with low power consumption and reduced time delay. Also the encryption is run by using clustering and random Permutation. In contrast, most of the existing ETC solutions induce significant penalty on the compression efficiency, so I was done a literature survey for the existing systems and proposed scheme. Here I proposed to implement the system in SPARTAN 6 FPGA and simulated using Xilinx ISE 14.7 software.