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Providing High Performance for Network Processing By Using DDR3 Based Look-Up Circuit


Affiliations
1 ECE Department, JNTUACE, Anantapur, Andhra Pradesh, India
2 ECE Department, JNTUACE, Anantapur, A.P, India
     

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DDR3 SDRAM (double-data-rate three synchronous dynamic random access memories) is a random access memory interface technology used for high bandwidth storage of the working data of a computer or other digital electronic devices. DDR3 SDRAM is the 3rd generation of DDR memories, featuring higher performance and lower power consumption. In comparison with earlier generations, DDR1/2 SDRAM, DDR3 SDRAM is a higher density device and achieves higher bandwidth due to the further increase of the clock rate and reduction in power consumption. the DDR3SDRAM controller is designed and it can interface with Look up table based Hash CAM circuit. Content-addressable memory (CAM) is a special type of computer memory used in certain very high speed searching applications. In this paper, an advanced DDR3SDRAM controller architecture was designed and which can interface with a high performance Hash-CAM based lockup circuit. The DDR3SDRAM controller normal write, read and fast read operations are verified by simulation, also compares normal read, fast read and DDR3SDRAM controller is synthesized.

Keywords

Content Address Memory, Double Data Rate, Synchronous Dynamic RAM.
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  • Providing High Performance for Network Processing By Using DDR3 Based Look-Up Circuit

Abstract Views: 313  |  PDF Views: 1

Authors

T. Jagadeesh
ECE Department, JNTUACE, Anantapur, Andhra Pradesh, India
P. Ramana Reddy
ECE Department, JNTUACE, Anantapur, A.P, India

Abstract


DDR3 SDRAM (double-data-rate three synchronous dynamic random access memories) is a random access memory interface technology used for high bandwidth storage of the working data of a computer or other digital electronic devices. DDR3 SDRAM is the 3rd generation of DDR memories, featuring higher performance and lower power consumption. In comparison with earlier generations, DDR1/2 SDRAM, DDR3 SDRAM is a higher density device and achieves higher bandwidth due to the further increase of the clock rate and reduction in power consumption. the DDR3SDRAM controller is designed and it can interface with Look up table based Hash CAM circuit. Content-addressable memory (CAM) is a special type of computer memory used in certain very high speed searching applications. In this paper, an advanced DDR3SDRAM controller architecture was designed and which can interface with a high performance Hash-CAM based lockup circuit. The DDR3SDRAM controller normal write, read and fast read operations are verified by simulation, also compares normal read, fast read and DDR3SDRAM controller is synthesized.

Keywords


Content Address Memory, Double Data Rate, Synchronous Dynamic RAM.