Design and Implementation of a Fractional Bit Encoded Spatial Modulator for the Versatile Multiple-Input Multiple Output (MIMO) System

In this paper, we present design and field programmable gate array (FPGA) implementation of fractional bit encoded (FBE)–spatial modulation (SM) based transmitter for the multiple-input multiple output (MIMO) system. SM is a novel approach to multiple–input–multiple–output (MIMO) systems which entirely avoids inter–channel interference (ICI) and requires no synchronization between the transmit antennas, while achieving a spatial multiplexing gain. This is performed by mapping a block of information bits into a constellation point in the signal and spatial domains. Fractional bit encoding is modulus conversion scheme which convert the incoming bit stream to numbers in an arithmetic base, or modulus, that is not a power of 2 .When applied to SM, FBE relies on encoding each point in the spatial domain, i.e., the antenna index, with, on average, a non–integer number of bits, while keeping unchanged the encoding process in the signal domain. This results in a more versatile system design allowing transmitter to be equipped with an arbitrary number of antennas for a wider range of spectral efficiencies given restrictions on space and power consumption. It is especially useful for compact mobile devices where cost and space constraints pose fundamental limits on the achievable bit rate. The synthesis results of the implementation of transmitter on FPGA are included in the paper.