Table of Contents
Vol 4, No 1 (2012)


Articles
A Multivariate Simultaneous Part Family Identification & Machine Part Cell Formation | ||
M. Prabu, P. Kalaamani | ||
Vol 4, No 1 (2012), Pagination: 1-5 | ||
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Abstract Views: 354 | PDF Views: 2 |
Power Optimized Embedded Processor Design with Parallel Pipelining | ||
Kiritkumar Bhatt, Saurabh M. Patel, A. I. Trivedi | ||
Vol 4, No 1 (2012), Pagination: 6-9 | ||
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Abstract Views: 330 | PDF Views: 3 |
Proportional Fair Allocation for MIMO-OFDMA Based Cellular Relay Networks | ||
P. Rengini, R. Nakkeeran | ||
Vol 4, No 1 (2012), Pagination: 10-14 | ||
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Abstract Views: 304 | PDF Views: 2 |
Centralized Parallel Form of Pattern Matching Algorithm in Packet Inspection by Efficient Utilization of Secondary Memory in Network Processor | ||
N. Kannaiya Raja, K. Arulanandam, B. Raja Rajeswari | ||
Vol 4, No 1 (2012), Pagination: 15-21 | ||
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Abstract Views: 324 | PDF Views: 2 |
Design for Remote Monitoring & Controlling the Gate of Dam by Using GPRS & Internet Web Page | ||
Pavan V. Sukode, K. Narayanan | ||
Vol 4, No 1 (2012), Pagination: 22-25 | ||
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Abstract Views: 325 | PDF Views: 2 |
Testing the Pattern Generation of Minimal Test Vectors for the Video Display | ||
S. Inthiyaz, G. Sandhya, M. Siva Kumar, M. Sridhar | ||
Vol 4, No 1 (2012), Pagination: 26-30 | ||
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Abstract Views: 296 | PDF Views: 2 |
A High Throughput VLSI Architecture Using Sphere Decoder Algorithm for Wireless Applications | ||
S. Soundharya, G. Prakash | ||
Vol 4, No 1 (2012), Pagination: 31-35 | ||
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Abstract Views: 426 | PDF Views: 2 |
A Novel VLSI Architecture with Reduced Hard Multiple Based on Higher Radix Hybrid Modified Booth Algorithm | ||
V. Priyadarshini, C. Rajasekaren, M. Jithin Kumar | ||
Vol 4, No 1 (2012), Pagination: 36-40 | ||
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Abstract Views: 347 | PDF Views: 2 |